vitasdk
Documentation of the vitasdk
dmac.h File Reference

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Data Structures

struct  SceKernelDmaOpTag
 
struct  SceKernelDmaOpEncDec
 
struct  SceKernelDmaOpChainParam
 
struct  SceKernelDmaOpEncDecChainParam
 
struct  SceKernelDmaOpDirectParam
 

Macros

#define SCE_KERNEL_DMAC_CHAIN_END   ((SceKernelDmaOpTag *)0xFFFFFFFF)
 Signifies the end of the DMA tag chain. More...
 
Command Fields
#define SCE_KERNEL_DMAC_CMD_OP_COPY   (0x00000000)
 
#define SCE_KERNEL_DMAC_CMD_OP_SET   (0x0000000C)
 
#define SCE_KERNEL_DMAC_CMD_OP_RNG   (0x00000004)
 
#define SCE_KERNEL_DMAC_CMD_OP_HASH_SHA1   (0x00000003)
 
#define SCE_KERNEL_DMAC_CMD_OP_HASH_SHA224   (0x0000000B)
 
#define SCE_KERNEL_DMAC_CMD_OP_HASH_SHA256   (0x00000013)
 
#define SCE_KERNEL_DMAC_CMD_OP_HMAC_SHA1   (0x00000023)
 
#define SCE_KERNEL_DMAC_CMD_OP_HMAC_SHA224   (0x0000002B)
 
#define SCE_KERNEL_DMAC_CMD_OP_HMAC_SHA256   (0x00000033)
 
#define SCE_KERNEL_DMAC_CMD_OP_ENCRYPT_AES_ECB   (0x00000001)
 
#define SCE_KERNEL_DMAC_CMD_OP_ENCRYPT_AES_CBC   (0x00000009)
 
#define SCE_KERNEL_DMAC_CMD_OP_ENCRYPT_AES_CTR   (0x00000011)
 
#define SCE_KERNEL_DMAC_CMD_OP_ENCRYPT_DES_ECB   (0x00000041)
 
#define SCE_KERNEL_DMAC_CMD_OP_ENCRYPT_DES_CBC   (0x00000049)
 
#define SCE_KERNEL_DMAC_CMD_OP_DECRYPT_AES_ECB   (0x00000002)
 
#define SCE_KERNEL_DMAC_CMD_OP_DECRYPT_AES_CBC   (0x0000000A)
 
#define SCE_KERNEL_DMAC_CMD_OP_DECRYPT_AES_CTR   (0x00000012)
 
#define SCE_KERNEL_DMAC_CMD_OP_DECRYPT_DES_ECB   (0x00000042)
 
#define SCE_KERNEL_DMAC_CMD_OP_DECRYPT_DES_CBC   (0x0000004A)
 
#define SCE_KERNEL_DMAC_CMD_USE_EXTERNAL_KEY   (0x00000080)
 
#define SCE_KERNEL_DMAC_CMD_KEYSIZE_64BIT   (0x00000000)
 
#define SCE_KERNEL_DMAC_CMD_KEYSIZE_128BIT   (0x00000100)
 
#define SCE_KERNEL_DMAC_CMD_KEYSIZE_192BIT   (0x00000200)
 
#define SCE_KERNEL_DMAC_CMD_KEYSIZE_256BIT   (0x00000300)
 
#define SCE_KERNEL_DMAC_CMD_HASH_UPDATE   (0x00000400)
 
#define SCE_KERNEL_DMAC_CMD_HASH_FINALIZE   (0x00000800)
 
#define SCE_KERNEL_DMAC_CMD_COHERENT_SRC   (0x01000000)
 L2 Cache Coherent pTag->src accesses. More...
 
#define SCE_KERNEL_DMAC_CMD_COHERENT_DST   (0x02000000)
 L2 Cache Coherent pTag->dst accesses. More...
 
#define SCE_KERNEL_DMAC_CMD_COHERENT_IV_READ   (0x04000000)
 L2 Cache Coherent pTag->iv reads. More...
 
#define SCE_KERNEL_DMAC_CMD_COHERENT_IV_WRITE   (0x08000000)
 L2 Cache Coherent pTag->iv writes. More...
 
Block size fields
#define SCE_KERNEL_DMAC_BLOCKSIZE_SRC_SHIFT   (0)
 
#define SCE_KERNEL_DMAC_BLOCKSIZE_SRC_MASK   (0x0000FFFF)
 
#define SCE_KERNEL_DMAC_BLOCKSIZE_DST_SHIFT   (16)
 
#define SCE_KERNEL_DMAC_BLOCKSIZE_DST_MASK   (0xFFFF0000)
 
Stat fields
#define SCE_KERNEL_DMAC_STAT_BUSY   (0x00000001)
 
#define SCE_KERNEL_DMAC_STAT_ABORTED   (0x00000002)
 
#define SCE_KERNEL_DMAC_STAT_ERROR_READ   (0x00010000)
 
#define SCE_KERNEL_DMAC_STAT_ERROR_WRITE   (0x00020000)
 
#define SCE_KERNEL_DMAC_STAT_ERROR_ILLEGAL_CONFIG   (0x00040000)
 
#define SCE_KERNEL_DMAC_STAT_ERROR_TAG   (0x00080000)
 
#define SCE_KERNEL_DMAC_STAT_ERROR_ZERO_BYTE   (0x00100000)
 
Coherency mask fields

This field, along with the SCE_KERNEL_DMAC_CMD_COHERENT_{SRC/DST} command flags, control cache coherency behavior for the src and dst.


The actual encoding of the subfields is still unknown.
Observed values:
DmacMemcpy - 0x3E7F3 (src: 0x1F3 dst: 0x1F3)
DmacMemset - 0x3E600 (src: 0x000 dst: 0x1F3)
SblDmac5 - 0x3FFFF (src: 0x1FF dst: 0x1FF)

#define SCE_KERNEL_DMAC_COHERENCY_MSK_SRC_SHIFT   (0)
 
#define SCE_KERNEL_DMAC_COHERENCY_MSK_SRC_MASK   (0x000001FF)
 
#define SCE_KERNEL_DMAC_COHERENCY_MSK_DST_SHIFT   (9)
 
#define SCE_KERNEL_DMAC_COHERENCY_MSK_DST_MASK   (0x0003FE00)
 
#define SCE_KERNEL_DMAC_COHERENCY_MSK_SRC_DST_MASK   (0x0003FFFF)
 
#define SCE_KERNEL_DMAC_COHERENCY_MSK_UNK_SHIFT   (18)
 
#define SCE_KERNEL_DMAC_COHERENCY_MSK_UNK_MASK   (0x07FC0000)
 This mask is set internally by DmacMgr. It likely affects the coherency of the DMA tag reads. More...
 
IV Coherency mask fields

This field, along with the SCE_KERNEL_DMAC_CMD_COHERENT_IV_{READ/WRITE} command flags, control cache coherency behavior for the iv.


The actual encoding of the subfields is still unknown.
Observed values:
SblDmac5 - 0x1FF01FF (read: 0x1FF write: 0x1FF)

#define SCE_KERNEL_DMAC_IV_COHERENCY_MSK_READ_SHIFT   (0)
 
#define SCE_KERNEL_DMAC_IV_COHERENCY_MSK_READ_MASK   (0x000001FF)
 
#define SCE_KERNEL_DMAC_IV_COHERENCY_MSK_WRITE_SHIFT   (16)
 
#define SCE_KERNEL_DMAC_IV_COHERENCY_MSK_WRITE_MASK   (0x01FF0000)
 
#define SCE_KERNEL_DMAC_IV_COHERENCY_MSK_RW_MASK   (0x01FF01FF)
 

Typedefs

typedef SceInt32 SceKernelDmaOpId
 
typedef void(* SceKernelDmaOpCallback) (SceKernelDmaOpId opid, SceUInt32 stat, void *pUserData, SceKernelDmaOpTag *pTag)
 

Enumerations

enum  SceKernelDmacId {
  SCE_KERNEL_DMAC_ID_DMAC01 = 0x10 , SCE_KERNEL_DMAC_ID_DMAC23 = 0x11 , SCE_KERNEL_DMAC_ID_DMAC4 = 0x12 , SCE_KERNEL_DMAC_ID_DMAC5 = 0x13 ,
  SCE_KERNEL_DMAC_ID_DMAC6 = 0x14
}
 
enum  SceKernelDmaOpFlag {
  SCE_KERNEL_DMA_OP_PHYSICAL_ADDR = 0x000 , SCE_KERNEL_DMA_OP_VIRTUAL_SRC_ADDR = 0x001 , SCE_KERNEL_DMA_OP_VIRTUAL_DST_ADDR = 0x010 , SCE_KERNEL_DMA_OP_VIRTUAL_ADDR = 0x011 ,
  SCE_KERNEL_DMA_OP_COMPLETE_CHAIN = 0x100
}
 
enum  SceKernelDmaOpSyncMode { SCE_KERNEL_DMA_OP_SYNC_POLL = 0x1 , SCE_KERNEL_DMA_OP_SYNC_WAIT = 0x2 , SCE_KERNEL_DMA_OP_SYNC_TIMED_WAIT = 0x3 }
 

Functions

 VITASDK_BUILD_ASSERT_EQ (4, SceKernelDmaOpId)
 
 VITASDK_BUILD_ASSERT_EQ (0x20, SceKernelDmaOpTag)
 
 VITASDK_BUILD_ASSERT_EQ (0x50, SceKernelDmaOpEncDec)
 
 VITASDK_BUILD_ASSERT_EQ (0xC, SceKernelDmaOpChainParam)
 
 VITASDK_BUILD_ASSERT_EQ (0x5C, SceKernelDmaOpEncDecChainParam)
 
 VITASDK_BUILD_ASSERT_EQ (0x6C, SceKernelDmaOpDirectParam)
 
SceKernelDmaOpId ksceKernelDmaOpAlloc (const char *name)
 Allocate a DMA Op handle. More...
 
int ksceKernelDmaOpFree (SceKernelDmaOpId opid)
 Free a DMA Op handle. More...
 
int ksceKernelDmaOpEnQueue (SceKernelDmaOpId opid)
 Enqueue a DMA Op. More...
 
int ksceKernelDmaOpDeQueue (SceKernelDmaOpId opid)
 Dequeue a DMA Op. More...
 
int ksceKernelDmaOpQuit (SceKernelDmaOpId opid)
 Cancel a DMA Op. More...
 
int ksceKernelDmaOpSync (SceKernelDmaOpId opid, SceKernelDmaOpSyncMode syncMode, SceUInt32 *pTimeout, SceKernelDmaOpTag **ppErrorTag)
 Synchronize with the completion of a DMA Op. More...
 
int ksceKernelDmaOpAssign (SceKernelDmaOpId opid, SceKernelDmacId dmac, SceUInt32 channel)
 Assign a DMA Op to one of the DMA controllers. More...
 
int ksceKernelDmaOpSetupDirect (SceKernelDmaOpId opid, SceKernelDmaOpDirectParam *pParam, SceKernelDmaOpFlag flag)
 Setup a DMA Op with a direct set of parameters. More...
 
int ksceKernelDmaOpSetupChain (SceKernelDmaOpId opid, SceKernelDmaOpTag *pTag, SceKernelDmaOpChainParam *pParam, SceKernelDmaOpFlag flag)
 Setup a DMA Op with a chain of tags. More...
 
int ksceKernelDmaOpConcatenate (SceKernelDmaOpId opid, SceKernelDmaOpTag *pTag, SceKernelDmaOpFlag flag)
 Append a new list of tags to the DMA Op. More...
 
int ksceKernelDmaOpSetCallback (SceKernelDmaOpId opid, SceKernelDmaOpCallback callback, void *pUserData)
 Set the callback for the completion of the DMA Op. More...
 
Generic DMA Functions
int ksceDmacMemcpy (void *dst, const void *src, SceSize size)
 DMA memcpy. More...
 
int ksceDmacMemset (void *dst, int c, SceSize size)
 DMA memset. More...