7 #ifndef _PSP2KERN_KERNEL_DMAC_H_
8 #define _PSP2KERN_KERNEL_DMAC_H_
44 #define SCE_KERNEL_DMAC_CHAIN_END ((SceKernelDmaOpTag *)0xFFFFFFFF)
55 #define SCE_KERNEL_DMAC_CMD_OP_COPY (0x00000000)
56 #define SCE_KERNEL_DMAC_CMD_OP_SET (0x0000000C)
57 #define SCE_KERNEL_DMAC_CMD_OP_RNG (0x00000004)
58 #define SCE_KERNEL_DMAC_CMD_OP_HASH_SHA1 (0x00000003)
59 #define SCE_KERNEL_DMAC_CMD_OP_HASH_SHA224 (0x0000000B)
60 #define SCE_KERNEL_DMAC_CMD_OP_HASH_SHA256 (0x00000013)
61 #define SCE_KERNEL_DMAC_CMD_OP_HMAC_SHA1 (0x00000023)
62 #define SCE_KERNEL_DMAC_CMD_OP_HMAC_SHA224 (0x0000002B)
63 #define SCE_KERNEL_DMAC_CMD_OP_HMAC_SHA256 (0x00000033)
64 #define SCE_KERNEL_DMAC_CMD_OP_ENCRYPT_AES_ECB (0x00000001)
65 #define SCE_KERNEL_DMAC_CMD_OP_ENCRYPT_AES_CBC (0x00000009)
66 #define SCE_KERNEL_DMAC_CMD_OP_ENCRYPT_AES_CTR (0x00000011)
67 #define SCE_KERNEL_DMAC_CMD_OP_ENCRYPT_DES_ECB (0x00000041)
68 #define SCE_KERNEL_DMAC_CMD_OP_ENCRYPT_DES_CBC (0x00000049)
69 #define SCE_KERNEL_DMAC_CMD_OP_DECRYPT_AES_ECB (0x00000002)
70 #define SCE_KERNEL_DMAC_CMD_OP_DECRYPT_AES_CBC (0x0000000A)
71 #define SCE_KERNEL_DMAC_CMD_OP_DECRYPT_AES_CTR (0x00000012)
72 #define SCE_KERNEL_DMAC_CMD_OP_DECRYPT_DES_ECB (0x00000042)
73 #define SCE_KERNEL_DMAC_CMD_OP_DECRYPT_DES_CBC (0x0000004A)
75 #define SCE_KERNEL_DMAC_CMD_USE_EXTERNAL_KEY (0x00000080)
77 #define SCE_KERNEL_DMAC_CMD_KEYSIZE_64BIT (0x00000000)
78 #define SCE_KERNEL_DMAC_CMD_KEYSIZE_128BIT (0x00000100)
79 #define SCE_KERNEL_DMAC_CMD_KEYSIZE_192BIT (0x00000200)
80 #define SCE_KERNEL_DMAC_CMD_KEYSIZE_256BIT (0x00000300)
82 #define SCE_KERNEL_DMAC_CMD_HASH_UPDATE (0x00000400)
83 #define SCE_KERNEL_DMAC_CMD_HASH_FINALIZE (0x00000800)
85 #define SCE_KERNEL_DMAC_CMD_COHERENT_SRC (0x01000000)
86 #define SCE_KERNEL_DMAC_CMD_COHERENT_DST (0x02000000)
87 #define SCE_KERNEL_DMAC_CMD_COHERENT_IV_READ (0x04000000)
88 #define SCE_KERNEL_DMAC_CMD_COHERENT_IV_WRITE (0x08000000)
95 #define SCE_KERNEL_DMAC_BLOCKSIZE_SRC_SHIFT (0)
96 #define SCE_KERNEL_DMAC_BLOCKSIZE_SRC_MASK (0x0000FFFF)
98 #define SCE_KERNEL_DMAC_BLOCKSIZE_DST_SHIFT (16)
99 #define SCE_KERNEL_DMAC_BLOCKSIZE_DST_MASK (0xFFFF0000)
106 #define SCE_KERNEL_DMAC_STAT_BUSY (0x00000001)
107 #define SCE_KERNEL_DMAC_STAT_ABORTED (0x00000002)
108 #define SCE_KERNEL_DMAC_STAT_ERROR_READ (0x00010000)
109 #define SCE_KERNEL_DMAC_STAT_ERROR_WRITE (0x00020000)
110 #define SCE_KERNEL_DMAC_STAT_ERROR_ILLEGAL_CONFIG (0x00040000)
111 #define SCE_KERNEL_DMAC_STAT_ERROR_TAG (0x00080000)
112 #define SCE_KERNEL_DMAC_STAT_ERROR_ZERO_BYTE (0x00100000)
126 #define SCE_KERNEL_DMAC_COHERENCY_MSK_SRC_SHIFT (0)
127 #define SCE_KERNEL_DMAC_COHERENCY_MSK_SRC_MASK (0x000001FF)
129 #define SCE_KERNEL_DMAC_COHERENCY_MSK_DST_SHIFT (9)
130 #define SCE_KERNEL_DMAC_COHERENCY_MSK_DST_MASK (0x0003FE00)
132 #define SCE_KERNEL_DMAC_COHERENCY_MSK_SRC_DST_MASK (0x0003FFFF)
134 #define SCE_KERNEL_DMAC_COHERENCY_MSK_UNK_SHIFT (18)
135 #define SCE_KERNEL_DMAC_COHERENCY_MSK_UNK_MASK (0x07FC0000)
147 #define SCE_KERNEL_DMAC_IV_COHERENCY_MSK_READ_SHIFT (0)
148 #define SCE_KERNEL_DMAC_IV_COHERENCY_MSK_READ_MASK (0x000001FF)
150 #define SCE_KERNEL_DMAC_IV_COHERENCY_MSK_WRITE_SHIFT (16)
151 #define SCE_KERNEL_DMAC_IV_COHERENCY_MSK_WRITE_MASK (0x01FF0000)
153 #define SCE_KERNEL_DMAC_IV_COHERENCY_MSK_RW_MASK (0x01FF01FF)
SceUInt32 setValue
8-bit value duplicated into 32 bits
Definition: dmac.h:224
SceUInt32 cmd
Bitwise combination of SCE_KERNEL_DMAC_CMD_* fields.
Definition: dmac.h:187
SceUInt32 keyring
Definition: dmac.h:188
SceUInt32 ivCoherencyMask
Definition: dmac.h:198
SceKernelDmaOpFlag
Definition: dmac.h:169
SceUInt32 coherencyMask
Definition: dmac.h:223
SceUInt32 coherencyMask
Definition: dmac.h:206
int ksceKernelDmaOpSetupChain(SceKernelDmaOpId opid, SceKernelDmaOpTag *pTag, SceKernelDmaOpChainParam *pParam, SceKernelDmaOpFlag flag)
Setup a DMA Op with a chain of tags.
void * iv
Must be a physical address.
Definition: dmac.h:197
SceKernelDmacId
Definition: dmac.h:161
int ksceKernelDmaOpSync(SceKernelDmaOpId opid, SceKernelDmaOpSyncMode syncMode, SceUInt32 *pTimeout, SceKernelDmaOpTag **ppErrorTag)
Synchronize with the completion of a DMA Op.
SceUInt32 blockSize
Definition: dmac.h:222
SceUInt32 blockSize
Definition: dmac.h:190
int ksceKernelDmaOpQuit(SceKernelDmaOpId opid)
Cancel a DMA Op.
SceKernelDmaOpSyncMode
Definition: dmac.h:177
SceUInt32 len
Definition: dmac.h:220
int ksceKernelDmaOpSetCallback(SceKernelDmaOpId opid, SceKernelDmaOpCallback callback, void *pUserData)
Set the callback for the completion of the DMA Op.
int ksceDmacMemset(void *dst, int c, SceSize size)
DMA memset.
SceUInt32 setValue
8-bit value duplicated into 32 bits
Definition: dmac.h:207
SceKernelDmaOpEncDec encDec
Definition: dmac.h:225
struct SceKernelDmaOpTag * pNext
Set to SCE_KERNEL_DMAC_CHAIN_END to signify the last tag.
Definition: dmac.h:191
void * iv
Must be a physical address.
Definition: dmac.h:189
SceKernelDmaOpChainParam header
header.size = sizeof(SceKernelDmaOpEncDecChainParam)
Definition: dmac.h:212
SceUInt32 keyring
Definition: dmac.h:196
int ksceKernelDmaOpSetupDirect(SceKernelDmaOpId opid, SceKernelDmaOpDirectParam *pParam, SceKernelDmaOpFlag flag)
Setup a DMA Op with a direct set of parameters.
SceUInt32 reserved
Definition: dmac.h:199
SceUInt32 cmd
Bitwise combination of SCE_KERNEL_DMAC_CMD_* fields.
Definition: dmac.h:221
int ksceKernelDmaOpDeQueue(SceKernelDmaOpId opid)
Dequeue a DMA Op.
SceSize size
Definition: dmac.h:205
void * dst
Definition: dmac.h:185
int ksceKernelDmaOpEnQueue(SceKernelDmaOpId opid)
Enqueue a DMA Op.
int ksceKernelDmaOpAssign(SceKernelDmaOpId opid, SceKernelDmacId dmac, SceUInt32 channel)
Assign a DMA Op to one of the DMA controllers.
VITASDK_BUILD_ASSERT_EQ(4, SceKernelDmaOpId)
int ksceKernelDmaOpConcatenate(SceKernelDmaOpId opid, SceKernelDmaOpTag *pTag, SceKernelDmaOpFlag flag)
Append a new list of tags to the DMA Op.
SceUInt8 key[0x40]
Definition: dmac.h:200
SceUInt32 len
Definition: dmac.h:186
int ksceKernelDmaOpFree(SceKernelDmaOpId opid)
Free a DMA Op handle.
SceKernelDmaOpId ksceKernelDmaOpAlloc(const char *name)
Allocate a DMA Op handle.
SceKernelDmaOpEncDec encDec
Definition: dmac.h:213
int ksceDmacMemcpy(void *dst, const void *src, SceSize size)
DMA memcpy.
void(* SceKernelDmaOpCallback)(SceKernelDmaOpId opid, SceUInt32 stat, void *pUserData, SceKernelDmaOpTag *pTag)
Definition: dmac.h:229
const void * src
Definition: dmac.h:218
const void * src
Definition: dmac.h:184
SceInt32 SceKernelDmaOpId
Definition: dmac.h:158
void * dst
Definition: dmac.h:219
@ SCE_KERNEL_DMA_OP_COMPLETE_CHAIN
Full DMA chain is provided, starting from pTag and ending with pTag + 1.
Definition: dmac.h:174
@ SCE_KERNEL_DMA_OP_PHYSICAL_ADDR
src and dst addresses are physical addresses
Definition: dmac.h:170
@ SCE_KERNEL_DMA_OP_VIRTUAL_SRC_ADDR
src addresses are virtual addresses
Definition: dmac.h:171
@ SCE_KERNEL_DMA_OP_VIRTUAL_ADDR
Both src and dst addresses are virtual addresses.
Definition: dmac.h:173
@ SCE_KERNEL_DMA_OP_VIRTUAL_DST_ADDR
dst addresses is virtual addresses
Definition: dmac.h:172
@ SCE_KERNEL_DMAC_ID_DMAC4
DMAC4.
Definition: dmac.h:164
@ SCE_KERNEL_DMAC_ID_DMAC6
DMAC6 (Devkit only)
Definition: dmac.h:166
@ SCE_KERNEL_DMAC_ID_DMAC23
DMAC2/3.
Definition: dmac.h:163
@ SCE_KERNEL_DMAC_ID_DMAC01
DMAC0/1.
Definition: dmac.h:162
@ SCE_KERNEL_DMAC_ID_DMAC5
DMAC5.
Definition: dmac.h:165
@ SCE_KERNEL_DMA_OP_SYNC_TIMED_WAIT
Wait for completion with timeout.
Definition: dmac.h:180
@ SCE_KERNEL_DMA_OP_SYNC_WAIT
Wait for completion.
Definition: dmac.h:179
@ SCE_KERNEL_DMA_OP_SYNC_POLL
Poll for completion without waiting.
Definition: dmac.h:178
SceSize size
struct size(variable size)
Definition: debug.h:0
int32_t SceInt32
Definition: types.h:44
unsigned int SceSize
Definition: types.h:56
uint32_t SceUInt32
Definition: types.h:45
uint8_t SceUInt8
Definition: types.h:36