7#ifndef _PSP2KERN_KERNEL_EXCPMGR_H_
8#define _PSP2KERN_KERNEL_EXCPMGR_H_
#define VITASDK_BUILD_ASSERT_EQ(__size__, __name__)
Definition build_utils.h:13
uint32_t r3
Definition excpmgr.h:104
uint32_t lr
Definition excpmgr.h:115
uint32_t r5
Definition excpmgr.h:106
uint32_t PMXEVCNTR2
Definition excpmgr.h:146
SceUInt32 DBGBCR1
Definition excpmgr.h:45
void() SceExcpmgrExceptionHandler(SceExcpmgrExceptionContext *context, SceExcpHandlingCode code)
Exception handler used at priorities 1-7.
Definition excpmgr.h:169
SceUInt32 DBGWVR2
Definition excpmgr.h:62
SceUInt32 DBGWVR3
Definition excpmgr.h:64
SceUIntPtr pc
Recorded source PC.
Definition excpmgr.h:91
uint32_t PMXEVTYPER5
Definition excpmgr.h:151
uint32_t IFSR
Definition excpmgr.h:130
uint32_t IFAR
Definition excpmgr.h:132
uint32_t r7
Definition excpmgr.h:108
uint32_t unk200[128]
Definition excpmgr.h:158
SceUInt32 DBGBVR4
Definition excpmgr.h:50
uint32_t PAR
Definition excpmgr.h:133
uint32_t PMCNTENSET
Definition excpmgr.h:136
uint32_t r9
Definition excpmgr.h:110
uint32_t PMCCNTR
Definition excpmgr.h:139
uint32_t PMSELR
Definition excpmgr.h:138
SceUInt32 DBGWCR2
Definition excpmgr.h:63
uint32_t TTBR1
Definition excpmgr.h:126
uint32_t DFSR
Definition excpmgr.h:129
uint32_t PMXEVCNTR1
Definition excpmgr.h:144
uint32_t PMCNTENSET_2
Second copy of PMCNTENSET.
Definition excpmgr.h:137
SceUInt32 DBGBVR2
Definition excpmgr.h:46
SceUInt32 DBGWCR0
Definition excpmgr.h:59
uint32_t PMXEVCNTR3
Definition excpmgr.h:148
uint32_t PMCR
Definition excpmgr.h:135
SceUInt32 DBGBVR0
Definition excpmgr.h:42
uint32_t PMXEVTYPER0
Definition excpmgr.h:141
uint32_t PMXEVTYPER2
Definition excpmgr.h:145
SceUInt32 reserved
Ignored on FW 3.60 by Excpmgr and Intrmgr; zero in the known default state stored in BSS.
Definition excpmgr.h:57
uint32_t unkD4
Definition excpmgr.h:154
SceUInt32 DBGBCR4
Definition excpmgr.h:51
uint32_t DBGSCRext
Definition excpmgr.h:155
SceExcpHandlingCode
Definition excpmgr.h:28
uint32_t r0
Definition excpmgr.h:101
SceUInt32 DBGWVR1
Definition excpmgr.h:60
uint32_t r4
Definition excpmgr.h:105
SceUInt32 reserved
Ignored on FW 3.60 by Excpmgr and Intrmgr; zero in the known default state stored in BSS.
Definition excpmgr.h:41
uint32_t sp
Definition excpmgr.h:114
uint32_t r6
Definition excpmgr.h:107
uint32_t FPSCR
Definition excpmgr.h:120
SceUIntPtr target_pc
Recorded target PC.
Definition excpmgr.h:92
uint32_t r1
Definition excpmgr.h:102
SceUInt32 DBGBCR0
Definition excpmgr.h:43
uint32_t CPACR
Definition excpmgr.h:119
struct SceExcpmgrExceptionHandlerContext * next
Pointer to the next handler record; bit 0 preserves Thumb state.
Definition excpmgr.h:172
uint32_t TEEHBR
Definition excpmgr.h:134
uint64_t VFP_registers[32]
Content of floating-point registers D0-D31.
Definition excpmgr.h:157
SceUInt32 DBGWCR3
Definition excpmgr.h:65
SceUInt32 DBGWVR0
Definition excpmgr.h:58
SceUInt32 DBGBVR1
Definition excpmgr.h:44
int unused[4]
Seemingly unused.
Definition excpmgr.h:71
SceExcpKind
Definition excpmgr.h:17
int nestedExceptionCount[4]
Active UNDEF, PABT, or DABT exception depth on each CPU core.
Definition excpmgr.h:70
uint32_t unusedD0
Definition excpmgr.h:153
SceUInt32 DBGBCR3
Definition excpmgr.h:49
uint32_t DACR
Definition excpmgr.h:128
uint32_t PMUSERENR
Definition excpmgr.h:140
SceArmWaypointEventType
Values stored in bits 0-2 of SceArmWaypoint::event.
Definition excpmgr.h:78
uint32_t TPIDRURW
Definition excpmgr.h:123
void * ExcpStackTop[4]
Base address of each CPU core's 0x1000-byte exception stack.
Definition excpmgr.h:72
SceUInt32 DBGBCR2
Definition excpmgr.h:47
uint32_t PMXEVTYPER1
Definition excpmgr.h:143
uint32_t r2
Definition excpmgr.h:103
uint32_t DFAR
Definition excpmgr.h:131
uint32_t TPIDRURO
Definition excpmgr.h:124
uint32_t r8
Definition excpmgr.h:109
SceExcpmgrData * ksceExcpmgrGetData(void)
Get a pointer to SceExcpmgr's internal data.
SceUInt32 raw_data
Printed and forwarded without interpretation on FW 3.60.
Definition excpmgr.h:90
uint32_t r10
Definition excpmgr.h:111
SceUInt32 DBGWCR1
Definition excpmgr.h:61
uint32_t FPEXC
Definition excpmgr.h:121
uint32_t r12
Definition excpmgr.h:113
SceKernelSpinlock lock
Definition excpmgr.h:56
uint32_t unused68
Definition excpmgr.h:127
uint32_t PMXEVCNTR0
Definition excpmgr.h:142
SceUInt32 event
Bit 31 marks a valid entry; bits 0-2 are one of SceArmWaypointEventType; for exception events,...
Definition excpmgr.h:93
uint32_t address_of_faulting_instruction
LR-8 for DABT, LR-4 for PABT or ARM UNDEF, and LR-2 for Thumb UNDEF.
Definition excpmgr.h:116
SceKernelSpinlock lock
Definition excpmgr.h:40
uint32_t PMXEVTYPER4
Definition excpmgr.h:149
SceExcpKind ExceptionKind
The kind of exception the CPU encountered.
Definition excpmgr.h:117
uint32_t PMXEVCNTR4
Definition excpmgr.h:150
int ksceExcpmgrRegisterHandler(SceExcpKind kind, int priority, void *handler)
Register an exception handler.
uint32_t CONTEXTIDR
Definition excpmgr.h:122
uint32_t unusedDC[9]
Definition excpmgr.h:156
uint32_t PMXEVCNTR5
Definition excpmgr.h:152
void * ExcpStackBottom[4]
Address immediately after each CPU core's exception stack, used as its initial stack pointer.
Definition excpmgr.h:73
uint32_t PMXEVTYPER3
Definition excpmgr.h:147
uint32_t SPSR
Definition excpmgr.h:118
uint32_t TPIDRPRW
Definition excpmgr.h:125
SceUInt32 DBGBVR3
Definition excpmgr.h:48
uint32_t r11
Definition excpmgr.h:112
SceUInt32 must_be_zero
Must be zero when registering during cold boot; otherwise unused on FW 3.60.
Definition excpmgr.h:174
@ SCE_EXCPMGR_EXCEPTION_NOT_HANDLED
Process an unhandled thread exception, then continue the handler chain.
Definition excpmgr.h:30
@ SCE_EXCPMGR_EXCEPTION_HANDLING_CODE_2
Passed on unchanged; no code that produces this value was found in the available FW 3....
Definition excpmgr.h:32
@ SCE_EXCPMGR_EXCEPTION_HANDLING_CODE_4
ThreadMgr queued the exception for later debug processing; the final handler follows the normal excep...
Definition excpmgr.h:35
@ SCE_EXCPMGR_EXCEPTION_HANDLED
Resume from the supplied exception context.
Definition excpmgr.h:29
@ SCE_EXCPMGR_EXCEPTION_NOT_HANDLED_FATAL
Fatal exception; panics the kernel.
Definition excpmgr.h:34
@ SCE_EXCP_FIQ
Definition excpmgr.h:25
@ SCE_EXCP_IRQ
Definition excpmgr.h:24
@ SCE_EXCP_UNDEF_INSTRUCTION
Definition excpmgr.h:19
@ SCE_EXCP_DABT
Definition excpmgr.h:22
@ SCE_EXCP_PABT
Definition excpmgr.h:21
@ SCE_EXCP_UNUSED
Definition excpmgr.h:23
@ SCE_EXCP_SVC
Definition excpmgr.h:20
@ SCE_EXCP_RESET
Definition excpmgr.h:18
@ SCE_ARM_WAYPOINT_EVENT_UNKNOWN_6
Definition excpmgr.h:85
@ SCE_ARM_WAYPOINT_EVENT_DEBUG_ENTRY
Definition excpmgr.h:83
@ SCE_ARM_WAYPOINT_EVENT_DEBUG_EXIT
Definition excpmgr.h:84
@ SCE_ARM_WAYPOINT_EVENT_DIRECT_BRANCH
Definition excpmgr.h:79
@ SCE_ARM_WAYPOINT_EVENT_EXCEPTION
Definition excpmgr.h:81
@ SCE_ARM_WAYPOINT_EVENT_MEMORY_BARRIER
Definition excpmgr.h:82
@ SCE_ARM_WAYPOINT_EVENT_UNKNOWN_7
Definition excpmgr.h:86
@ SCE_ARM_WAYPOINT_EVENT_INDIRECT_BRANCH
Definition excpmgr.h:80
int SceKernelSpinlock
Regular Spinlock.
Definition types.h:200
unsigned int SceUIntPtr
Definition types.h:84
uint32_t SceUInt32
Definition types.h:45