sdif.h

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#ifndef _PSP2KERN_KERNEL_SDIF_H_
#define _PSP2KERN_KERNEL_SDIF_H_
 
#include <vitasdk/build_utils.h>
#include <psp2kern/types.h>
#include <psp2kern/kernel/threadmgr/fast_mutex.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
typedef enum SceSdifDeviceIndex {
    SCE_SDIF_DEVICE_EMMC = 0x0, 
    SCE_SDIF_DEVICE_GC   = 0x1, 
    SCE_SDIF_DEVICE_SDIO = 0x2, 
    SCE_SDIF_DEVICE_SD   = 0x3, 
} SceSdifDeviceIndex;
 
#define SCE_SDIF_DEVICE_USD SCE_SDIF_DEVICE_SD
 
typedef enum SceSdifDeviceType {
    SCE_SDIF_DEVICE_TYPE_INVALID = 0x0,
    SCE_SDIF_DEVICE_TYPE_MMC     = 0x1,
    SCE_SDIF_DEVICE_TYPE_SD      = 0x2,
    SCE_SDIF_DEVICE_TYPE_SDIO    = 0x3,
} SceSdifDeviceType;
 
typedef void* SceSdifDeviceContext;
 
typedef struct SceSdifContextPart SceSdifContextPart;
 
SceSdifDeviceContext* ksceSdifGetSdContextPartValidateMmc(SceSdifDeviceIndex dev_index);
 
int ksceSdifInitializeMmcDevice(SceSdifDeviceIndex dev_index, SceSdifDeviceContext* dev_ctx);
 
int ksceSdifWriteCmd56(SceSdifDeviceContext* dev_ctx, const void* buf, SceSize size);
 
int ksceSdifReadCmd56(SceSdifDeviceContext* dev_ctx, void* buf, SceSize size);
 
typedef struct SceSdifContextPartBase {
    struct SceSdifContextGlobal *global_context; 
    SceUInt32 card_flags; 
    union {
        SceUInt32 mmc_sector_size; 
        SceUInt32 sd_write_protected; 
        SceUInt32 sdio_function_count; 
    };
    union {
        SceUInt32 mmc_uses_special_sector_map; 
        SceUInt32 sd_sector_size; 
        SceUInt32 sdio_reserved_0C; 
    };
    SceUInt8 cid[16]; 
    SceUInt8 csd[16]; 
} SceSdifContextPartBase;
VITASDK_BUILD_ASSERT_EQ(0x30, SceSdifContextPartBase); // size is from FW 3.60
 
typedef struct SceSdifHostRegisters {
    volatile SceUInt32 dma_system_address;
    volatile SceUInt16 block_size;
    volatile SceUInt16 block_count;
    volatile SceUInt32 argument;
    volatile SceUInt16 transfer_mode;
    volatile SceUInt16 command;
    volatile SceUInt32 response[4];
    volatile SceUInt32 buffer_data_port;
    volatile SceUInt32 present_state;
    volatile SceUInt8 host_control;
    volatile SceUInt8 power_control;
    volatile SceUInt8 block_gap_control;
    volatile SceUInt8 wakeup_control;
    volatile SceUInt16 clock_control;
    volatile SceUInt8 timeout_control;
    volatile SceUInt8 software_reset;
    volatile SceUInt16 normal_interrupt_status;
    volatile SceUInt16 error_interrupt_status;
    volatile SceUInt16 normal_interrupt_status_enable;
    volatile SceUInt16 error_interrupt_status_enable;
    volatile SceUInt16 normal_interrupt_signal_enable;
    volatile SceUInt16 error_interrupt_signal_enable;
    volatile SceUInt16 auto_cmd_error_status;
    volatile SceUInt16 host_control_2;
    volatile SceUInt32 capabilities[2];
    volatile SceUInt32 maximum_current_capabilities;
    SceUInt8 reserved_4C[4];
    volatile SceUInt16 force_event_auto_cmd_error_status;
    volatile SceUInt16 force_event_error_interrupt_status;
    volatile SceUInt8 adma_error_status;
    SceUInt8 reserved_55[3];
    volatile SceUInt32 adma_system_address;
    SceUInt8 reserved_5C[0xA0];
    volatile SceUInt16 slot_interrupt_status;
    volatile SceUInt16 host_controller_version;
    SceUInt8 reserved_100[0xF00];
} SceSdifHostRegisters;
VITASDK_BUILD_ASSERT_EQ(0x1000, SceSdifHostRegisters); // size is from FW 3.60
 
typedef enum SceSdifCommandState {
    SCE_SDIF_COMMAND_STATE_FREE      = 0,
    SCE_SDIF_COMMAND_STATE_QUEUED    = 1,
    SCE_SDIF_COMMAND_STATE_ACTIVE    = 2,
    SCE_SDIF_COMMAND_STATE_COMPLETED = 3,
} SceSdifCommandState;
 
typedef struct SceSdifCmdInput {
    SceSize size; 
    SceUInt32 state_flags;
    SceUInt32 command; 
    SceUInt32 argument; 
 
    union {
        SceUInt8 bytes[0x10];
        struct {
            SceUInt32 dw0;
            SceUInt32 dw1;
            SceUInt32 dw2;
            SceUInt32 dw3;
        } words;
    } response;
 
    void *buffer; 
    SceUInt16 block_size; 
    SceUInt16 block_count; 
    SceInt32 error_code; 
    SceUInt32 unknown_2C; 
 
    SceUInt8 command_specific_data[0x30];
 
    struct SceSdifCmdInput *next_cmd;
    SceSdifCommandState state;
    SceUInt32 command_index; 
    int (*completion_callback)(struct SceSdifCmdInput *cmd);
 
    SceUID event_flag_id; 
    struct SceSdifCmdInput *secondary_cmd; 
    struct SceSdifContextGlobal *global_context;
    SceUIntPtr active_dma_descriptors_paddr; 
 
    SceUInt8 internal_dma_descriptors[0x80]; 
 
    void *active_dma_descriptors; 
    SceKernelPARange physical_ranges[16]; 
 
    SceUIntPtr internal_dma_descriptors_paddr; 
    SceUID dma_descriptor_memblock_uid; 
    SceUInt32 unknown_18C; 
 
    SceUInt32 unknown_190; 
    SceUInt32 unknown_194; 
    void *aligned_buffer; 
    SceSize aligned_buffer_size; 
 
    SceSize leading_fragment_size; 
    SceSize trailing_fragment_size; 
    SceUIntPtr leading_fragment_paddr; 
    SceUIntPtr trailing_fragment_paddr; 
 
    SceInt64 start_time; 
    SceInt64 end_time; 
 
    SceUInt8 leading_fragment[0x40]; 
    SceUInt8 trailing_fragment[0x40]; 
} SceSdifCmdInput;
VITASDK_BUILD_ASSERT_EQ(0x240, SceSdifCmdInput); // size is from FW 3.60
 
typedef struct SceSdifContextData {
    SceSdifCmdInput *free_cmd_head;
    SceSdifCmdInput *free_cmd_tail;
    SceSdifCmdInput *pending_cmd_head;
    SceSdifCmdInput *pending_cmd_tail;
 
    SceSdifDeviceType device_type;
    SceSdifContextPartBase *device_context; 
    SceUInt32 supported_voltages;
    SceUInt32 relative_card_address; 
 
    SceUInt32 controller_index; 
    SceUInt8 command_complete; 
    SceUInt8 suspended; 
    SceUInt8 unknown_26; 
    SceUInt8 unknown_27; 
    SceSdifCmdInput *active_cmd;
    SceSdifCmdInput *active_data_cmd;
 
    SceSdifHostRegisters *host_registers; 
    SceUInt32 enabled_subintr_mask;
    SceUInt8 timeout_control; 
    SceUInt8 slow_mode; 
    SceUInt8 slow_read_count; 
    SceUInt8 slow_write_count; 
 
    SceUID host_registers_uid; 
 
    SceUID event_flag_id; 
    SceKernelFastMutex sdif_fast_mutex; 
 
    // It looks like this chunk is a separate structure since offset 0x2480 is used too often.
 
    SceUID dma_descriptor_pool_uid; 
    void *dma_descriptor_pool; 
    SceUInt32 ocr; 
 
    SceUInt32 unknown_90; 
    SceKernelSpinlock spinlock;
    SceUInt64 last_transfer_duration; 
 
    SceUInt8 sdio_interrupt_status;
    SceUInt8 sdio_enabled_function_mask;
    SceUInt8 sdio_pending_function_mask;
    SceUInt8 unknown_A3; 
    SceUInt32 sdio_subintr2_intr_code; 
    SceUInt32 sdio_subintr3_8_intr_code; 
    SceUInt32 sdio_dispatch_pending;
 
    SceUInt32 unknown_B0; 
    SceUInt32 unknown_B4; 
    SceUInt32 unknown_B8; 
    SceUInt32 unknown_BC; 
} SceSdifContextData;
VITASDK_BUILD_ASSERT_EQ(0xC0, SceSdifContextData); // size is from FW 3.60
 
typedef struct SceSdifContextGlobal {
    SceSdifCmdInput commands[16]; 
    SceSdifContextData ctx_data;
} SceSdifContextGlobal;
VITASDK_BUILD_ASSERT_EQ(0x24C0, SceSdifContextGlobal); // size is from FW 3.60
 
int ksceSdifGetCardInsertState1(SceSdifDeviceIndex device_index);
 
int ksceSdifGetCardInsertState2(SceSdifDeviceIndex device_index);
 
int ksceSdifGetCID(const SceSdifContextPart *ctx, void *cid);
 
SceSdifContextGlobal *ksceSdifGetSdContextGlobal(SceSdifDeviceIndex device_index);
 
SceSdifDeviceContext* ksceSdifGetSdContextPartValidateSd(SceSdifDeviceIndex dev_index);
 
SceSdifContextPart *ksceSdifGetSdContextPartValidateSdio(SceSdifDeviceIndex device_index);
 
int ksceSdifInitializeSdDevice(SceSdifDeviceIndex device_index, SceSdifContextPart **result);
 
int ksceSdifReadSectorMmc(SceSdifContextPart *ctx, SceUInt32 sector, void *buffer, SceUInt32 sector_count);
 
int ksceSdifReadSectorSd(SceSdifContextPart *ctx, SceUInt32 sector, void *buffer, SceUInt32 sector_count);
 
int ksceSdifWriteSectorMmc(SceSdifContextPart *ctx, SceUInt32 sector, const void *buffer, SceUInt32 sector_count);
 
int ksceSdifWriteSectorSd(SceSdifContextPart *ctx, SceUInt32 sector, const void *buffer, SceUInt32 sector_count);
 
int ksceSdifMemoryCardEnableSlowMode(void);
 
int ksceSdifMemoryCardDisableSlowMode(void);
 
#ifdef __cplusplus
}
#endif
 
#endif /* _PSP2KERN_KERNEL_SDIF_H_ */